By David Nakamura | AI & Data News · AIdataNewsGlobal
For a decade, the cost of training a frontier model has been quoted in one currency: Nvidia accelerators, measured against the CUDA stack. A report now circulating through hardware supply chains changes the currency rather than the number. People with knowledge of the programme say DeepSeek intends to build its next flagship, DeepSeek V5, around Huawei Ascend 950 silicon as core training compute, with the schedule paced toward 2027. The same account has the technical liaison teams of DeepSeek and the Huawei Ascend side permanently seated in Hangzhou, and says a large body of low-level operator adaptation and customised development was already completed during the V4 phase. Neither company has confirmed any of it — which is exactly why the story deserves a procurement reading instead of a headline reaction.
Reframed that way, DeepSeek V5 is less a model announcement than an unusually clean experiment: can a non-CUDA accelerator family absorb pre-training, the workload that exposes every weakness in a software stack, an interconnect and a supply chain long before inference ever has to?
The distance between the first list and the second is the editorial bottom line: an unverified supply-chain report, not a product launch.
None of these figures come from DeepSeek or Huawei regarding this specific project. They are the boundary conditions against which the rumour should be judged.
| Decision dimension | Ascend-native training (the DeepSeek V5 scenario) | Imported accelerator training | Split stack: domestic inference, imported training |
|---|---|---|---|
| Software risk | Kernel-level rework required; mitigated where the model uses standard MoE and attention patterns. Six DeepSeek kernel libraries already ported to Ascend. | Mature toolchain, tuned libraries, large talent pool. | Keeps training on the proven stack while only the serving layer migrates. |
| Supply certainty | Allocation-driven. Huawei's roadmap shows 950DT arriving in Q4 2026 and Ascend 960 only in Q4 2027, so a 2027 run must draw on 950-era parts. | Exposed to export licensing on both sides; limited H200 volumes reported for a small set of firms. | Partially insulated, but the training half stays policy-sensitive. |
| Scale evidence | SuperPoD architecture is designed for multi-thousand-card domains (up to 8,192 Ascend 950DT described). | Proven at larger single-cluster scale historically. | Inherits whichever ceiling applies to the training half. |
| Cost leverage | Strong where domestic pricing, subsidies and local support are bundled together. | Higher unit cost plus licensing friction. | Costs spread; optimisation gains are modest. |
| Best suited to | A lab that controls its own kernels and can afford engineering time as a first-class cost. | Teams shipping research variants on tight deadlines. | Regulated deployments and high-traffic serving under a still-foreign training pipeline. |
Inference is a throughput problem: kernels run in a known order, memory behaviour is predictable, and a slow operator costs milliseconds. Pre-training is a coordination problem. Tens of thousands of devices must hold a shared gradient state for weeks, and every weak link shows up as a stalled step, a loss spike, or a cluster that silently loses throughput over a long run. That is why the master account's detail matters: the Hangzhou-based teams reportedly spent the V4 phase on low-level operator adaptation and custom development, which is the cheapest possible insurance policy before a training migration.
Two engineering pressures follow. The first is compiler reach: Huawei has been opening up its CANN toolkit and its AscendC programming layer, and DeepSeek's ported kernel projects suggest the most fragile performance gaps sit in expert-routing and communication kernels, where MoE models spend a disproportionate share of their time. The second is failure economics: a domestic cluster of 950-era parts must demonstrate week-long stable runs at acceptable model-flop utilisation, a metric no vendor publishes and every buyer eventually measures.
Huawei's published roadmap places the Ascend 950DT in the fourth quarter of 2026 and the successor Ascend 960 in the fourth quarter of 2027. A DeepSeek V5 training programme paced toward 2027 therefore fits between the two dates: enough shipping time for 950-era hardware to reach volume, and enough runway to build a cluster before the next architecture cycle distracts the vendor. If the schedule were 2026, the plan would be implausible on supply grounds alone. The reported date is the most informative part of the report.
No. The report comes from media citing people familiar with the supply chain; the specific technical plan and progress still await official confirmation.
The reported pattern is a stage change: Huawei Ascend hardware carried inference only in the previous generation, while joint work at the V4 stage on operators and customised development is described as groundwork for training.
Because it is the largest publicly visible test of whether frontier-scale pre-training can be done outside the CUDA ecosystem. The answer shapes migration budgets, chip roadmaps and pricing expectations everywhere.
Not on this evidence. Kernel porting reduces switching costs at the model layer, but toolchain breadth, debugging practice and the size of the trained-talent pool still favour the incumbent for most workloads.
Three things: an official statement from DeepSeek or Huawei naming the 950 variant and cluster size; a public training log or paper citing non-CUDA hardware; and Huawei shipping volume of 950-era parts consistent with a 2027 training schedule.

The strategic conclusion for 2026 is narrow but useful: a frontier lab and a domestic chip family have reportedly spent a generation aligning their software, and the next model is where that alignment gets paid for or written off. Until the companies speak, the rational posture is qualification, not commitment — benchmark one non-CUDA cluster against your own training job and let the measured utilisation figure, not the headline, carry the decision. AI & Data News will update this comparison as details are confirmed; corrections and editorial queries can be sent to editorial@aidatanews.com.