Pluggable optics have quietly become a pinch point in AI factory build-outs, and two companies have now teamed up to redefine the format. NVIDIA and Cisco have created Ultra-Dense Small Form Factor Pluggable, known as USFP, an optical transceiver form factor engineered to carry 400 Gb/s-per-lane links in next-generation AI factories. The partners state that the approach yields four times the bandwidth density of current 200 Gb/s-per-lane pluggable optics, along with better power efficiency and capacity of up to 12.8 Tb/s. The AIdataNewsGlobal General desk breaks down the specification, the connector design behind it, the ecosystem plan and what it changes for infrastructure buyers worldwide.
| Dimension | USFP figure | Reference point |
|---|---|---|
| Link rate | 400 Gb/s per lane electrical signaling | Performance at 200 Gb/s is also improved |
| Bandwidth and front-panel density | four times | Existing 200 Gb/s-per-lane pluggable modules |
| Power efficiency | approximately 1.3 times better | Current pluggable optics |
| Aggregate capacity | up to 12.8 Tb/s | Per module |
| Lane count | 16 full-duplex lanes in an OSFP-sized footprint initially | Later variants may grow to 32 lanes or more |
| Thermal handling | up to 100W dissipated | No dedicated embedded cooling circuit required |
| Ecosystem partners named so far | TE Connectivity and Amphenol | More partners expected to join |
AI infrastructure is increasingly limited less by how fast a single link runs than by how many computing systems can be reached through the panel space available in a rack. Growing the network by adding switching layers brings extra latency, extra cost and extra power consumption with it.
The stated goal of USFP is therefore to let AI infrastructure operators attach more computing systems within the same network footprint, sidestepping those additional layers. Initial transceivers are planned to pack 16 full-duplex lanes into an OSFP-sized footprint, serving both switches and SuperNICs, and the partners say later variants may grow to 32 lanes or more.
Relative to existing 200 Gb/s-per-lane pluggable modules, the companies report four times the bandwidth and front-panel bandwidth density, plus approximately 1.3 times better power efficiency.
The central innovation sits in the physical interface. USFP uses a two-dimensional array connector combined with a two-step insertion mechanism, in which high-speed electrical contacts engage only after the module is inserted.
“Building the world’s largest AI factories starts with rethinking the smallest of connections,” said Gilad Shainer, senior vice president NVIDIA.
“With USFP, NVIDIA and Cisco are building an ecosystem to reinvent pluggable optics — connecting more computing with greater efficiency to power the next generation of AI factories.”
With TE Connectivity and Amphenol, NVIDIA and Cisco are developing USFP connectors, cages and modules, and more partners are expected to join.
The firms also intend to create an open industry specification through a community-led multi-source project. For component suppliers, the promise is a common platform for interoperable high-density optical hardware rather than a single-vendor path.
The effort extends the existing collaboration between NVIDIA Spectrum-X Ethernet networking and Cisco Silicon One-based networks, and is aimed at AI infrastructure deployments across enterprises, neocloud providers and sovereign cloud operators.
Ultra-Dense Small Form Factor Pluggable, a jointly created optical transceiver form factor built to enable 400 Gb/s-per-lane links in next-generation AI factories.
The partners state four times the bandwidth and front-panel bandwidth density of present 200 Gb/s-per-lane pluggable modules, with capacity of up to 12.8 Tb/s and approximately 1.3 times better power efficiency.
Initial transceivers are planned with 16 full-duplex lanes in an OSFP-sized footprint, serving switches and SuperNICs; later variants may grow to 32 lanes or more.
The two-dimensional array connector and its two-step insertion mean high-speed electrical contacts engage only after the module is inserted, which helps reduce contact wear, improve signal integrity and give a more predictable insertion force.
Modules can dissipate up to 100W without a dedicated embedded cooling circuit, a feature that may simplify switch designs and improve reliability.
The stated intent is the opposite: connectors, cages and modules are being developed with TE Connectivity and Amphenol, and the firms plan an open industry specification via a community-led multi-source project.
The work extends collaboration between NVIDIA Spectrum-X Ethernet networking and Cisco Silicon One-based networks, targeting enterprises, neocloud providers and sovereign cloud operators.
The announcement sets a direction rather than a shipping date, and the practical signal to track is the breadth of the partner list: more participants are expected to join the connector, cage and module work alongside TE Connectivity and Amphenol, and the multi-source project will show whether an open specification for this density level actually converges.
For buyers planning AI networks, the test is narrower: whether a four-times density gain in the same OSFP-class footprint, at 400 Gb/s per lane and with approximately 1.3 times better efficiency, lets them connect more computing without adding switching layers, power and complexity in equal measure.